virewave note
VireWave:
UDP throughput x 90% => 拿來設定Latency 的 speed rate 再取求 latency rate.
UDP frame size : 64, 88, 128, 256, 512, 1024, 1280, 1518
acceptable loss = 95%
Test configuration:
learning time: 2 seconds
Achieved transmit time: 30 seconds
search minimum: 1
starting point: 50.0%
Search Maximum: 110.0%
Acceptable loss : 0.1 %
TCP traffic should be a minimum of 76 Bytes
76, 88, 128, 256, 512, 1024, 1280, 1518
How to setup a delay time before user actions or processing time.
The time parameter value on the SLEEP command lets you emulate delays caused by user actions or processing time. The SLEEP command does not consume CPU cycles; it only simulates a delay, not the CPU or disk overhead that a real application might use.
Standard SLEEP Variables
There are three standard SLEEP variables that you can select:
There are three standard SLEEP variables that you can select:
delay_before_responding
This variable lets you simulate a user delay or processing at the endpoint. Before the next script command is executed, the endpoint sleeps for the number of milliseconds specified.
This variable lets you simulate a user delay or processing at the endpoint. Before the next script command is executed, the endpoint sleeps for the number of milliseconds specified.
transacton_delay
This variable lets you control how frequently transactions are executed. You can set the number of milliseconds to sleep before starting to execute additional commands. This is normally used to simulate an end user running a transaction on a regular basis; for example, once every 1 second.
initial_delay
The initial_delay variable is different from the other sleep variables. The longest allowable time for initial_delay is 90 minutes—that is, 5,400,000 ms. Longer values cause Endpoint 2 to time out, and the connection fails.
This variable lets you control how frequently transactions are executed. You can set the number of milliseconds to sleep before starting to execute additional commands. This is normally used to simulate an end user running a transaction on a regular basis; for example, once every 1 second.
initial_delay
The initial_delay variable is different from the other sleep variables. The longest allowable time for initial_delay is 90 minutes—that is, 5,400,000 ms. Longer values cause Endpoint 2 to time out, and the connection fails.
[perforance] QoS One to Many
sequence:
1. GE0 to FE0, 每一個Priority 打100 packets ( per burst) 共800個 packets.
2. GE0 to FE1, 每一個Priority 打100 packets ( per burst) 共800個 packets.
3. .......以至類推
4. 共 loop 9300次 (4 個port × 8 個priority 共 32個 Streams )
1. GE0 to FE0, 每一個Priority 打100 packets ( per burst) 共800個 packets.
2. GE0 to FE1, 每一個Priority 打100 packets ( per burst) 共800個 packets.
3. .......以至類推
4. 共 loop 9300次 (4 個port × 8 個priority 共 32個 Streams )
[performance] Partially Meshed
Partially Meshed Test
是用來測定DUT的傳送frames最大容許能力，多個傳送Ports 到多個接收ports在一個網路格式，在那傳送Ports 沒有接收 和接收Ports沒有傳送時。
per burst 4 packets.
是用來測定DUT的傳送frames最大容許能力，多個傳送Ports 到多個接收ports在一個網路格式，在那傳送Ports 沒有接收 和接收Ports沒有傳送時。
per burst 4 packets.
[performance] Head of line blocking.
Description:
這個測驗 尋找 在一個"不擁塞(uncongested)" output interface上 所增加的delay,每當從一個input interface 那裡得到框架,再試圖把frames轉傳送到一個擁擠的output interface. 如果那Port 是設定為half duplex, collisions 應該被發現的在那擁擠的interface. 但如果是 full duplex 和 flow control 是enabled, flow control frames 應該被發現.
Topology:
Port A, B 傳送封包到 Port C. 而 Port A 也傳送封包到 Port D.
(Port A 傳到 Port C, D 而Port B傳到 C, 此時 Port C 會收到 Port A 和Port B傳送來的封包 而造成 Port C的擁擠 100% offered load. 但 Port D只有收到 Port A 所傳送來的封包 所以Port D 是不擁擠的Port 只有 50% 的offered load.)
這個測驗 尋找 在一個"不擁塞(uncongested)" output interface上 所增加的delay,每當從一個input interface 那裡得到框架,再試圖把frames轉傳送到一個擁擠的output interface. 如果那Port 是設定為half duplex, collisions 應該被發現的在那擁擠的interface. 但如果是 full duplex 和 flow control 是enabled, flow control frames 應該被發現.
Topology:
Port A, B 傳送封包到 Port C. 而 Port A 也傳送封包到 Port D.
(Port A 傳到 Port C, D 而Port B傳到 C, 此時 Port C 會收到 Port A 和Port B傳送來的封包 而造成 Port C的擁擠 100% offered load. 但 Port D只有收到 Port A 所傳送來的封包 所以Port D 是不擁擠的Port 只有 50% 的offered load.)
[performance] Back to Back.
Description:
這個測驗是測定，在沒有 frames loss 情況下，DUT 能夠 接收 和 轉送 的最大時間。
frames 是傳送 user-specified rate, 通常 最大理論 rate是基於port speed.
Topology:
This test uses pairs of ports with one-to-one traffic mapping; one port transmits to one receive port.
這個測驗是測定，在沒有 frames loss 情況下，DUT 能夠 接收 和 轉送 的最大時間。
frames 是傳送 user-specified rate, 通常 最大理論 rate是基於port speed.
Topology:
This test uses pairs of ports with one-to-one traffic mapping; one port transmits to one receive port.
[performance] latency test.
在 latency 測試， frames 是傳送一個固定的時間. 在 每秒 test 框架加標簽和透過持續時間時間 half way 傳導它。 當這test 傳導什麼時候收到了frames時, 測驗把連接的框架的 timestamp 與 timestamp 比較。 二個 timestamps 之間的差別是等待時間。
Address learning test.
Description:
在沒有 folooding 或者 droppig 框架的情況下，Switch 能夠學習新 MAC address 的Max rate.
(學的多快)
Topology:
This test uses the one-to-many mapping but only one port is used for transmission at a time; received address packets should appear on the specified receive ports.
在沒有 folooding 或者 droppig 框架的情況下，Switch 能夠學習新 MAC address 的Max rate.
(學的多快)
Topology:
This test uses the one-to-many mapping but only one port is used for transmission at a time; received address packets should appear on the specified receive ports.
Address cache testing
Description:
這個測試是用Binary search 的方式找出 每個 port 或一台 swcitch 的 address table size.
IXIA port 1 是DA 遞增，port 2,3,4 是 SA 遞增
當port 2,3,4 傳送packet出去後，然後L2 會將mac學起來。再由Ixia的port 1 傳到 Port 2,3,4以確定那些mac是有被學起來的!
Topology:
Then the test only needs to be run on one transmit port to all receive ports on the switch; This test is configured with a one-to-many traffic mapping.
這個測試是用Binary search 的方式找出 每個 port 或一台 swcitch 的 address table size.
IXIA port 1 是DA 遞增，port 2,3,4 是 SA 遞增
當port 2,3,4 傳送packet出去後，然後L2 會將mac學起來。再由Ixia的port 1 傳到 Port 2,3,4以確定那些mac是有被學起來的!
Topology:
Then the test only needs to be run on one transmit port to all receive ports on the switch; This test is configured with a one-to-many traffic mapping.
[Performance] Frame Error Filtering of IXIA.
The LM1000T-5 Load Module(GE module) not support 'Alignment' and 'Dribble'.
The LM100TX Load Module(FE module) suport all item. (Undersize,Oversize,Fragment,Alignment,Dribble,Bad CRC)
The LM100TX Load Module(FE module) suport all item. (Undersize,Oversize,Fragment,Alignment,Dribble,Bad CRC)
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